The present invention relates to metal silicide technology, more specifically to a process for fabricating a semiconductor device having metal silicide interconnections.
Efforts have been made to use metal silicides, in particular the, so-called "refractory silicides" such as molybdenum silicide (MoSi.sub.2), and tungsten silicide (WSi.sub.2), for interconnections in large-scale integrated circuits (LSI's), since they have a lower electrical resistance than that of polysilicon and a higher heat resistance than that of aluminum; polysilicon and aluminum being the material most widely used for interconnections in LSI's at present. Polysilicon will be repaced by metal silicides which have electrical resistances one order lower than that of polysilicon in LSI's in which the electrical resistance of the interconnection tends to increase as the degree of the integration of the LSI's are increased, since the interconnection lines may be longer and/or thinner.
When fabricating a metal silicide interconnection, a layer of metal silicide, e.g., MoSi.sub.2, is formed over a substrate by, for example, a simultaneous sputtering (co-sputtering) method. The metal silicide layer is patterned by a conventional photolithography process. For example, a phospho-silicate-glass (PSG) layer is formed on the patterned metal silicide layer as an insulating layer between the conductive layers. A further conductive layer of, e.g., aluminum is formed on this insulating layer and is covered with another insulating layer. In such a prior art fabrication process, the metal silicide layer contains steep steps after it has been patterned, which may cause discontinuity in the insulating layer formed thereon, decreasing the quality of the insulation between the conductive layers formed on and under the metal silicide layer. The steep steps in the metal silicide layer may result in steps at the surface of the insulating layer formed on the metal silicide layer, which causes deterioration in the quality of the conducting lines formed on the insulating layer. Further, patterning of a metal silicide layer, e.g., MoSi.sub.2, by a conventional photolithography technique is difficult and may damage an active layer under or below the metal silicide layer due to attacks by the ions during an anisotropic reactive ion etching, which is usually used for patterning metal silicide.